GOLDELOX Processor Datasheet

Description

The Goldelox is a custom embedded graphics controller designed to interface with many popular OLED and LCD panels. Powerful graphics, text, image, animation and countless more features are built right inside the chip. It offers a simple plug-n-play interface to many 8bit 80-Series colour LCD and OLED displays.

The chip is designed to work with minimal design effort and all of the data and control signals are provided by the chip to interface directly to the display. Simply choose your display and interface it to the Goldelox on your application board. This offers enormous advantage to the designer in development time and cost saving and takes away all of the burden of low level design.

The Goldelox belongs to a family of processors powered by a highly optimised soft core virtual engine, EVE (Extensible Virtual Engine). EVE is a proprietary, high performance virtual processor with an extensive byte-code instruction set optimised to execute compiled 4DGL programs. 4DGL (4D Graphics Language) was specifically developed from ground up for the EVE engine core. It is a high level language which is easy to learn and simple to understand yet powerful enough to tackle many embedded graphics applications.

The device offers modest but comprehensive I/O features and can interface to SPI, serial, analogue, digital, buttons, joystick and Dallas 1-wire devices. Provision is also made for creating complex sound effects for audible user feedback with an extended RTTTL tone generator.

All of the display built-in driver libraries implement and share the same high-level function interface. This allows your GUI application to be portable to different display controller types.

4D Labs software development IDE called Workshop4 is FREE and there are no licensing requirements.

The Goldelox offers one of the most flexible embedded graphics solutions available.

Features

• Low-cost OLED, LCD and TFT display graphics user interface solution.
• Ideal as a standalone embedded graphics processor or interface to any host controller as a graphics co-processor.
• Connect to any colour display that supports an 80-Series 8 bit wide CPU interface. All data and control signals are provided.
• Built in high performance virtual processor engine (EVE) with an extensive byte-code instruction set optimised for 4DGL, the high level 4D Graphics Language.
• 2 x GPIO ports supports:
  • Digital I/O
  • A/D converter with 8/10 bit resolution
  • Complex sound generation
  • Dedicated RTTTL tune engine
  • Multi-Switch Joystick
  • Dallas 1-Wire
• 10KB of Flash memory for user code storage and 510 bytes (255 x 16bit vars) of RAM for user variables.
• 1 x 32bit free running system timer with 1msec resolution.
• 4 x 16bit user timers with 1msec resolution
• Asynchronous hardware Serial port with auto-baud feature (300 to 600K baud).
• Hardware SPI port interface for micro-SD/micro-SDHC memory cards or Serial Flash memory chips for storing of icons, images, animations, etc.
• Comprehensive set of built in high level 4DGL graphics functions and algorithms that can draw lines, circles, text, and much more.
• Display full colour images, animations, icons and video clips.
• 8x8 built-in system font and support for unlimited user customisable fonts with fixed or proportional spacing with the aid of a freely provided Font-Tool.
• Single 3.3 Volt Supply @12mA typical.
• Available in a tiny 6mm x 6mm 28pin QFN.

Applications

• Industrial (general).
• Test, measurement and general purpose instrumentation.
• Elevator Control Systems.
• Point of Sale Terminals.
• Home Appliances (general).
• Security Systems.
• Access Control Systems.
• Air-conditioning Control Systems.
• Universal Remote Control.
• Automotive (general).
• Electronic Gauges and Meters.
• Portable ECG Systems.
• Portable Blood Pressure Monitors.
• Aviation (general).
• Gaming and Slot Machines.
• And much more...

Pin Configuration and Summary

Goldelox Processor Pin Out

Pin	Symbol	I/O	Description
1	RD	O	Display Read strobe signal. Goldelox asserts this signal LOW when reading data from the display. Connect this pin to the Read (RD) signal of the display.
2	WR	O	Display Write strobe signal. Goldelox asserts this signal LOW when writing data to the display. Connect this pin to the Write (WR) signal of the display.
3	REF	P	Internal voltage regulator filter capacitor. Connect a 4.7uF to 10uF capacitor from this pin to Ground.
4	RS	O	Display Register Select. LOW: Display index or status register is selected. HIGH: Display GRAM or register data is selected. Connect this pin to the Register Select (RS or A0 or C/D or similar naming convention) signal of the display.
5	GND	P	Ground.
6	CLK1	I	System Clock input 1 of a 12MHz crystal.
7	CLK2	O	System Clock input 2 of a 12MHz crystal.
8	SDCS	O	SPI device Chip Select. Connect this pin to the Chip Enable (CE or CS) signal of the external SPI device (SD/SDHC memory card, Serial Flash chip, etc.).
9	CS	O	Display Chip Select. Goldelox asserts this signal LOW when accessing the display. Connect this pin to the Chip Select (CS) signal of the display.
10	RES	O	Display RESET. Goldelox initialises the display by strobing this pin LOW. Connect this pin to the Reset (RES) signal of the display.
11	SCK	O	SPI Serial Clock output. Connect this pin to the SPI Serial Clock (SCK) signal of the external device. Nominally reserved for SD/SDHC memory card or serial flash memory chip. See SPI Timing Diagram for detailed timing diagram.
12	SDI	I	SPI Serial Data Input. Connect this pin to the SPI Serial Data Out (SDO) signal of the external device. Nominally reserved for SD/SDHC memory card or serial flash memory chip. SPI Timing Diagram for detailed timing diagram.
13	SDO	O	SPI Serial Data Output. Connect this pin to the SPI Serial Data In (SDI) signal of the external device. Nominally reserved for SD/SDHC memory card or serial flash memory chip. See SPI Timing Diagram for detailed timing diagram.
14	TX0	O	Asynchronous Serial Transmit pin. Output data is at TTL voltage levels. Connect this pin to external device Serial Receive (Rx) signal. This pin is tolerant up to 5.0V levels.
15	RX0	I	Asynchronous Serial Receive pin. Connect this pin to external device Serial Transmit (Tx) signal. This pin is tolerant up to 5.0V levels.
16	GND	P	Ground.
17	VCC	P	Positive supply with respect to GND pin.
18	D0	I/O	Display Data Bus bit 0.
19	D1	I/O	Display Data Bus bit 1.
20	D2	I/O	Display Data Bus bit 2.
21	D3	I/O	Display Data Bus bit 3.
22	D4	I/O	Display Data Bus bit 4.
23	D5	I/O	Display Data Bus bit 5.
24	D6	I/O	Display Data Bus bit 6.
25	D7	I/O	Display Data Bus bit 7.
26	RESET	I	Master Reset signal. Connect a 4.7K resistor from this pin to VCC.
27	IO1	I/O/A	General purpose IO1 pin. See General Purpose I/O Interface section for more detail.
28	IO2	I/O	General purpose IO2 pin. See General Purpose I/O Interface section for more detail.
PAD	GND	P	Exposed metal pad under the package, must connect to GND.

Note

I = Input, O = Output, P = Power, A = Analogue

Hardware Interface Pins

The Goldelox provides both a hardware and software interface. This section describes in detail the hardware interface.

Display Interface

The Goldelox supports LCD and OLED displays with an 80-Series 8 bit wide CPU data interface. The connectivity to the display is easy and straight forward. The chip generates all of the necessary timing to drive the display.

Display Operation Table

CS	RS	RD	WR	Operation
0	0	0	1	Read Display Status Register
0	0	1	0	Write Display Index Register
0	1	0	1	Read Display GRAM Data
0	1	1	0	Write Register or GRAM Data
1	X	X	X	No Operation

D0-D7 pins (Display Data Bus):

The Display Data Bus (D0-D7) is an 8 bit bidirectional port and all data writes and reads occur over this bus. Other control signals such as RW, RD CS, and RS synchronise the data transfer to and from the display.

CS pin (Display Chip Select):

The access to the display is only possible when the Display Chip Select (CS) is asserted LOW. Connect this pin to the Chip Select (CS) signal of the display.

RS pin (Display Register Select):

The RS signal determines whether a register command or data is sent to the display.

LOW: Display index or status register is selected.
HIGH: Display GRAM or register data is selected.

Connect this pin to the Register Select (RS) signal of the display. Different displays utilise various naming conventions such as RS, A0, C/D or similar. Be sure to check with your display manufacturer for the correct name and function.

RES pin (Display Reset):

Display RESET. Goldelox initialises the display by strobing this pin LOW. Connect this pin to the Reset (RES) signal of the display. This signal can also be used to control the back-light of the LCD or as the DC/DC converter enable.

Refer to the reference design section for an example.

WR pin (Display Write):

This is the display write strobe signal. The Goldelox asserts this signal LOW when writing data to the display in conjunction with the display data bus (D0-D7). Connect this pin to the Write (WR) signal of the display.

Item	Sym	Min	Typ	Max	Unit
Write Low Pulse	tWL	170	-	-	ns
Write High Pulse	tWH	85	-	-	ns
Write Bus Cycle Total	tWT	255	-	-	ns
Write Data Setup	tDS	85	-	-	ns

RD pin (Display Read):

This is the display read strobe signal. The Goldelox asserts this signal LOW when reading data from the display in conjunction with the display data bus (D0-D7). Connect this pin to the Read (RD) signal of the display.

Item	Sym	Min	Typ	Max	Unit
Read Low Pulse	tRL	300	-	-	ns
Read High Pulse	tRH	300	-	-	ns
Read Bus Cycle Total	tRT	600	-	-	ns
Read Data Hold	tDH	150	-	-	ns

SPI Interface - Master Mode

Goldelox supports micro-SD/micro-SDHC memory cards as well as Serial Flash memory chips via its hardware SPI interface. These storage devices are used for all multimedia file storage such as images, animations and movie clips. The memory card can also be used as general purpose storage for data logging applications. Support is available for micro-SD with up to 2GB capacity and for high capacity HC memory cards starting from 4GB and above. The Goldelox also supports any other general purpose SPI serial device.

SDI pin (SPI Serial Data In):

The SPI Serial Data Input (SDI). It connects to the Serial Data Out (SDO) pin of external SPI device.

SDO pin (SPI Serial Data Out):

The SPI Serial Data Output (SDO). This pin connects to the Serial Data In (SDI) signal of the external SPI device.

SCK pin (SPI Serial Clock):

The SPI Serial Clock output (SCK). This pin connects to the Serial Clock (SCK) signal of the external SPI device.

SDCS pin (SPI Chip Select):

SPI device Chip Select (SDCS). Connect this pin to the Chip Enable (CE or CS) signal of the external SPI device.

Also refer to SPI Timing Diagram section.

Note

SPI Master Only

Serial Port - UART

The Goldelox has a dedicated hardware UART that can communicate with external serial devices. This is referred to as the COM0 module. The primary features are:

• Full-Duplex 8 bit data transmission and reception through the TX and RX pins.
• Data format: 8 bits, No Parity, 1 Stop bit.
• Auto Baud feature.
• Baud rates from 300 baud up to 600K baud.
• Single byte transmits and receives or a fully buffered service. The buffered service feature runs in the background capturing and buffering serial data without the user application having to constantly poll the serial port. This frees up the application to service other tasks.

The Serial port is also the primary interface for downloading user application code (compiled 4DGL byte-code) into the Goldelox flash program memory. Once the download is complete the serial port is available for user application.

Note

Low level PmmC chip programming and updates also take place via the serial port.

Refer to the In Circuit Serial Programming section for further details.

TX pin (Serial Transmit):

Asynchronous Serial port Transmit pin, TX. Connect this pin to external serial device Serial Receive (Rx) signal.

RX pin (Serial Receive):

Asynchronous Serial port Receive pin, RX. Connect this pin to external serial device Serial Transmit (Tx) signal.

General Purpose I/O Interface

There are 2 GPIO pins available, IO1 and IO2. Each GPIO has a multitude of high level functions associated with it and these can be selected within 4DGL user application code.

Refer to the Goldelox Internal Functions manual for a complete set of built in 4DGL library functions.

IO1, IO2 pins (General Purpose Input Output):

General purpose IO1, IO2 pins. The table below lists the available GPIO functions and features.

GPIO Functions and Features

Function	IO1	IO2
Digital Input	Yes	Yes
Digital Output	Yes	Yes
A/D Converter 8/10 bits	Yes
Dallas 1-Wire support	Yes	Yes
Sound Generation, RTTTL Tunes	Yes	Yes
Joystick -- 5 position multi-switch	Yes

Input/Output:

Both IO1 and IO2 pins can be programmed to be Inputs or Outputs. Diagram below shows a LED connected to IO1 (programmed as an output) and a button connected to IO2 (programmed as an input).

Analogue to Digital Converter:

The IO1 pin can be programmed as an A/D input. Option is available to select 8 bit or 10 bit resolution. Diagram below is a circuit of a Light Dependent Resistor (LDR) connected to IO1 to measure and record changes in ambient light.

Dallas 1-Wire:

The Dallas 1-Wire protocol is a form of serial communications designed to operate over a single data line plus ground reference. Multiple 1-Wire devices can be attached to the same shared data line to network many devices. One wire device support is available on both the IO1 and the IO2 pins.

The diagram below depicts a typical 1-Wire temperature sensor interface.

Joystick - Multi Switch:

Multiple buttons or a multi-switch Joystick can be connected to the IO1 pin. Up to 5 buttons or a 5 position multi-switch joystick connects to a junction of a resistor ladder network that forms a voltage divider. The A/D converter of the IO1 pin internally reads the analogue value and decodes it accordingly. This feature is supported by dedicated 4DGL library functions.

The following diagrams indicate how to connect up to 5 individual buttons or a multi-switch joystick to the IO1 pin.

Unused buttons do not need resistors to be connected to the circuit. The table below lists the buttons and corresponding resistor values.

No. of Buttons	Button Number	Resistor Value
1	SW1	22K
2	SW2	10K
3	SW3	4.7K
4	SW4	2.2K
5	SW5	1.2K

Sound Output:

The Goldelox is capable of generating complex sounds and RTTTL tunes from its IO1 and IO2 pins. A simple speaker circuit as shown below can be utilized.

System Pins

VCC pin (Device Supply Voltage):

Device supply voltage pin. This pin must be connected to a regulated supply voltage in the range of 3.0 Volts to 3.6 Volts DC. Nominal operating voltage is 3.3 Volts.

GND, PAD pins (Device Ground):

Device ground pins. These pins must be connected to ground.

RESET pin (Device Master Reset):

Device Master Reset pin. An active low pulse of greater than 2 micro-seconds will reset the device. Connect a resistor (1K through to 10K, nominal 4.7K) from this pin to VCC. Only use open collector type circuits to reset the device if an external reset is required. This pin is not driven low by any internal conditions.

CLK1, CLK2 pins (Device Oscillator Inputs):

CLK1 and CLK2 are the device oscillator pins. Connect a 12MHz AT strip cut crystal with 22pF capacitors from each pin to GND as shown in the diagram below.

Programming Language

The Goldelox graphics processor belongs to a family of processors powered by a highly optimised soft core virtual engine, EVE (Extensible Virtual Engine).

EVE is a proprietary, high-performance virtual machine with an extensive byte-code instruction set optimised to execute compiled 4DGL programs. 4DGL (4D Graphics Language) was specifically developed from the ground up for the EVE engine core. It is a high-level language that is easy to learn and simple to understand yet powerful enough to tackle many embedded graphics applications.

4DGL is a graphics-oriented language allowing rapid application development, and the syntax structure was designed using elements of popular languages such as C, Basic, Pascal and others.

Programmers familiar with these languages will feel right at home with 4DGL. It includes many familiar instructions such as IF..ELSE..ENDIF, WHILE..WEND, REPEAT..UNTIL, GOSUB..ENDSUB, GOTO, PRINT as well as some specialised instructions SERIN, SEROUT, GFX_LINE, GFX_CIRCLE and many more.

For detailed information about the 4DGL language, please refer to the following documents:

• 4DGL Programmers Reference Manual
• GOLDELOX Internal Functions Manual

To assist with the development of 4DGL applications, the Workshop4 IDE combines a full-featured editor, a compiler, a linker and a downloader into a single PC-based application. It's all you need to code, test and run your applications.

In Circuit Serial Programming

The Goldelox processor can be re-programmed with the latest PmmC configuration for updates and future proofing. The chip-level configuration is available as a PmmC (Personality-module-micro-Code) file and the programming must be performed over the serial interface. The chip-resident internal 4DGL functions are part of the Goldelox PmmC configuration file so please check regularly for the latest updates and enhancements.

A PmmC file can only be programmed into the device via its serial port and an access to this must be provided for on the target application board. This is referred to as In Circuit Serial Programming (ICSP). Diagram below provides a typical implementation for the ICSP interface.

ICSP Interface

The PmmC file is programmed into the device with the aid of Workshop4, the 4D Labs IDE software (See Workshop4 IDE section). To provide a link between the PC and the ICSP interface, a specific 4D Programming Cable is required and is available from 4D Systems.

Using a non-4D programming interface could damage your display, and void your Warranty.

Note

The Goldelox chip is shipped blank and it must be programmed with the PmmC configuration file.

Memory Organization

The figure below illustrates how the Goldelox internal memory is organised.

System Registers Memory Map

The following tables outline in detail the Goldelox system registers and flags.

System (BYTE Size) Registers Memory Map

LABEL	ADDRESS DEC	ADDRESS HEX	USAGE	NOTES
VY1	129	0x81	display hardware GRAM y1 pos	SYSTEM (R/O)
VX1	128	0x80	display hardware GRAM x1 pos	SYSTEM (R/O)
VX2	130	0x82	display hardware GRAM x2 pos	SYSTEM (R/O)
VY2	131	0x83	display hardware GRAM y2 pos	SYSTEM (R/O)
SYS_X_MAX	132	0x84	display hardware X res-1	SYSTEM (R/O)
SYS_Y_MAX	133	0x85	display hardware Y res-1	SYSTEM (R/O)
WRITE_GRAM_REG	134	0x86	display GRAM write address	SYSTEM (R/O)
READ_GRAM_REG	135	0x87	display GRAM read address	SYSTEM (R/O)
IMAGE_WIDTH	136	0x88	loaded image/animation width	SYSTEM (R/O)
IMAGE_HEIGHT	137	0x89	loaded image/animation height	SYSTEM (R/O)
IMAGE_DELAY	138	0x8A	frame delay (if animation)	USER
IMAGE_MODE	139	0x8B	image/animation colour mode	SYSTEM (R/O)
CLIP_LEFT_POS	140	0x8C	left clipping point setting	USER
CLIP_TOP_POS	141	0x8D	top clipping point setting	USER
CLIP_RIGHT_POS	142	0x8E	right clipping point setting	USER
CLIP_BOTTOM_POS	143	0x8F	bottom clipping point setting	USER
CLIP_LEFT	144	0x90	left clipping point active	USER
CLIP_TOP	145	0x91	top clipping point active	USER
CLIP_RIGHT	146	0x92	right clipping point active	USER
CLIP_BOTTOM	147	0x93	bottom clipping point active	USER
FONT_TYPE	148	0x94	0 = fixed, 1 = proportional	SYSTEM (R/O)
FONT_MAX	149	0x95	number of chars in font set	SYSTEM (R/O)
FONT_OFFSET	150	0x96	ASCII offset (usually 0x20)	SYSTEM (R/O)
FONT_WIDTH	151	0x97	width of font (pixel units)	SYSTEM (R/O)
FONT_HEIGHT	152	0x98	height of font (pixel units)	SYSTEM (R/O)
TEXT_XMAG	153	0x99	text width magnification	USER
TEXT_YMAG	154	0x9A	text height magnification	USER
TEXT_MARGIN	155	0x9B	text place holder for CR	SYSTEM (R/O)
TEXT_DELAY	156	0x9C	text delay effect (0-255msec)	USER
TEXT_X_GAP	157	0x9D	X pixel gap between chars	USER
TEXT_Y_GAP	158	0x9E	Y pixel gap between chars	USER
GFX_XMAX	159	0x9F	width of current orientation	SYSTEM (R/O)
GFX_YMAX	160	0xA0	height of current orientation	SYSTEM (R/O)
GFX_SCREENMODE	161	0xA1	Current screen mode (0-3)	SYSTEM (R/O)
reserved	162-165	0xA2-0xA50	reserved	SYSTEM (R/O)

Note

SYSTEM	SYSTEM registers are maintained by internal system functions and should not be written to. They should only ever be read. *DO NOT WRITE to these registers.
USER	USER registers are read/write (R/W) registers used to alter the system behaviour. Refer to the individual functions for information on the interaction with these registers.

These registers are accessible with peekB and pokeB functions.

System (WORD size) Registers Memory Map

LABEL	ADDRESS DEC	ADDRESS HEX	USAGE	NOTES
SYS_OVERFLOW	83	0x53	16bit overflow register	USER
SYS_COLOUR	84	0x54	internal variable for colour	SYSTEM
SYS_RETVAL	85	0x55	return value of last function	SYSTEM
GFX_BACK_COLOUR	86	0x56	screen background colour	USER
GFX_OBJECT_COLOUR	87	0x57	graphics object colour	USER
GFX_TEXT_COLOUR	88	0x58	text foreground colour	USER
GFX_TEXT_BGCOLOUR	89	0x59	text background colour	USER
GFX_OUTLINE_COLOUR	90	0x5A	circle/rectangle outline	USER
GFX_LINE_PATTERN	91	0x5B	line draw tessellation	USER
IMG_PIXEL_COUNT	92	0x5C	count of pixels in image	SYSTEM
IMG_FRAME_COUNT	93	0x5D	count of frames in animation	SYSTEM
MEDIA_HEAD	94	0x5E	media sector head position	SYSTEM
SYS_OUTSTREAM	95	0x5F	Output stream handle	SYSTEM
GFX_LEFT	96	0x60	image left real point	SYSTEM
GFX_TOP	97	0x61	image top real point	SYSTEM
GFX_RIGHT	98	0x62	image right real point	SYSTEM
GFX_BOTTOM	99	0x63	image bottom real point	SYSTEM
GFX_X1	100	0x64	image left clipped point	SYSTEM
GFX_Y1	101	0x65	image top clipped point	SYSTEM
GFX_X2	102	0x66	image right clipped point	SYSTEM
GFX_Y2	103	0x67	image bottom clipped point	SYSTEM
GFX_X_ORG	104	0x68	current X origin	USER
GFX_Y_ORG	105	0x69	current Y origin	USER
RANDOM_LO	106	0x6A	random generator LO word	SYSTEM
RANDOM_HI	107	0x6B	random generator HI word	SYSTEM
MEDIA_ADDR_LO	108	0x6C	media byte address LO	SYSTEM
MEDIA_ADDR_HI	109	0x6D	media byte address HI	SYSTEM
SECTOR_ADDR_LO	110	0x6E	media sector address LO	SYSTEM
SECTOR_ADDR_HI	111	0x6F	media sector address HI	SYSTEM
SYSTEM_TIMER_LO	112	0x70	1msec system timer LO word	USER
SYSTEM_TIMER_HI	113	0x71	1msec system timer HI word	USER
TIMER0	114	0x72	1msec user timer 0	USER
TIMER1	115	0x73	1msec user timer 1	USER
TIMER2	116	0x74	1msec user timer 2	USER
TIMER3	117	0x75	1msec user timer 3	USER
INCVAL	118	0x76	predec/preinc/postdec/postinc addend	USER
TEMP_MEDIA_ADDRLO	119	0x77	temporary media address LO	SYSTEM
TEMP_MEDIA_ADDRHI	120	0x78	temporary media address HI	SYSTEM
GFX_TRANSPARENTCOLOUR	121	0x79	Image transparency colour	USER
GFX_STRINGMETRIX	122	0x7A	Low byte = string width High byte = string height	SYSTEM
GFX_TEMPSTORE1	123	0x7B	Low byte = last character printed High byte = video frame timer over-ride	SYSTEM
reserved	124	0x7C	reserved	SYSTEM
reserved	125	0x7D	reserved	SYSTEM
SYS_FLAGS1	126	0x7E	system control flagsword 0	FLAGS
SYS_FLAGS2	127	0x7F	system control flags word 1	FLAGS
USR_SP	128	0x80	User defined stack pointer	USERSTACK
USR_MEM	129	0x81	255 user variables /array(s)	MEMORY
SYS_STACK	384	0x180	128 level EVE machine stack	SYSTEMSTACK

Note

SYSTEM	SYSTEM registers are maintained by internal system functions and should not be written to. They should only ever be read. *DO NOT WRITE to these registers.
USER	USER registers are read/write (R/W) registers used to alter the system behaviour. Refer to the individual functions for information on the interaction with these registers.
USERSTACK	Used by the debugging and system extension utilities
MEMORY	255 word size variables for users program
STACK	128 word EVE system stack (STACK grows upwards)
FLAGS	FLAGS are a mixture of bits that are either maintained by internal system functions or set / cleared by various system functions. Refer to the FLAGS Register Bit Map table, and the individual functions for further details.

These registers are accessible with peekB and pokeB functions.

FLAG Registers Bit Map

REGISTER	ADDRESS DEC	ADDRESS HEX	NAME	USAGE	NOTES	VALUES
SYS_FLAGS1	126	0x7E	*denotes auto reset
	Bit 0		_STREAMLOCK	Used internally	SYSTEM	0x0001
	Bit 1		_PENSIZE	Object, 0 = solid, 1 = outline	SYSTEM	0x0002
	Bit 2		_OPACITY	Text, 0 = transparent, 1 = opaque	SYSTEM	0x0004
	Bit 3		_OUTLINED	box/circle outline 0 = off, 1 = on	SYSTEM	0x0008
	Bit 4		_BOLD	* Text, 0 = normal, 1 = bold	SYSTEM	0x0010
	Bit 5		_ITALIC	* Text, 0 = normal, 1 = italic	SYSTEM	0x0020
	Bit 6		_INVERSE	* Text, 0 = normal, 1 = inverse	SYSTEM	0x0040
	Bit 7		_UNDERLINED	* Text, 0 = normal, 1 = underlined	SYSTEM	0x0080
	Bit 8		_CLIPPING	0 = clipping off, 1 = clipping on	SYSTEM	0x0100
	Bit 9		_STRMODE	Used internally	SYSTEM	0x0200
	Bit 10		_SERMODE	Used internally	SYSTEM	0x0400
	Bit 11		_TXTMODE	Used internally	SYSTEM	0x0800
	Bit 12		_MEDIAMODE	Used internally	SYSTEM	0x1000
	Bit 13		_PATTERNED	Used internally	SYSTEM	0x2000
	Bit 14		_COLOUR8	Display mode, 0 = 16bit, 1 = 8bit	SYSTEM	0x4000
	Bit 15		_MEDIAFONT	0 = internal font, 1 = media font	SYSTEM	0x8000
SYS_FLAGS2	127	0x7F
	Bit 0		_MEDIA_INSTALLED	SD or FLASH device is detected/active	SYSTEM	0x0001
	Bit 1		_MEDIA_TYPE	0 = SD, 1 = FLASH chip	SYSTEM	0x0002
	Bit 2		_MEDIA_READ	1 = MEDIA read in progress	SYSTEM	0x0004
	Bit 3		_MEDIA_WRITE	1 = MEDIA write in progress	SYSTEM	0x0008
	Bit 4		_OW_PIN	0 = IO1, 1 = IO2 (Dallas OW Pin)	SYSTEM	0x0010
	Bit 5		_PTR_TYPE	Used internally	SYSTEM	0x0020
	Bit 6		_TEMP1	Used internally	SYSTEM	0x0040
	Bit 7		_TEMP2	Used internally	SYSTEM	0x0080
	Bit 8		_RUNMODE	1 = running pcode from media	SYSTEM	0x0100
	Bit 9		_SIGNED	0 = number printed '-' prepend	SYSTEM	0x0200
	Bit 10		_RUNFLAG	1 = EVE processor is running	SYSTEM	0x0400
	Bit 11		_SINGLESTEP	1 = set breakpoint for debugger	SYSTEM	0x0800
	Bit 12		_COMMINT	1 = buffered coms active	SYSTEM	0x1000
	Bit 13		_DUMMY16	1 = display needs 16bit dummy	SYSTEM	0x2000
	Bit 14		_DISP16	1 = display is 16bit interface	SYSTEM	0x4000
	Bit 15		_PROPFONT	1 = current font is proportional	SYSTEM	0x8000

Hardware Tools

The following hardware tools are required for full control of the Goldelox Processor.

Programming Tools

The 4D Programming Cable, uUSB-PA5 and gen4-PA Programming Adaptors are essential hardware tools to program, customise and test the Goldelox Processor.

Note

Any of the 4D Programming Cable, uUSB-PA5-II or 4D-UPA Programming Adaptor can be used, along with previous generation 4D programmers too.

The 4D programming interfaces are used to program a new Firmware/PmmC, Display Driver and for downloading compiled 4DGL code into the processor. They even serve as an interface for communicating serial data to the PC.

The 4D Programming Cable, uUSB-PA5-II and 4D-UPA Programming Adaptor are available from the 4D Systems website. Using a non-4D programming interface could damage your processor, and void your Warranty.

4D Programming Cable

uUSB-PA5-II

4D-UPA Programming Adaptor

Evaluation Display Modules

The following modules, available from 4D Systems, can be used for evaluation purposes to discover what the Goldelox processor has to offer.

uOLED-128-G2 - 1.5" Intelligent Goldelox Display

Other modules, such as the 0.96" and 1.7" OLED, or 1.44" LCD versions are also available. Please contact 4D Systems for more information, or visit the 4D Systems website.

Workshop4 IDE

Workshop4 is a comprehensive software IDE that provides an integrated software development platform for all of the 4D family of processors and modules. The IDE combines the Editor, Compiler, Linker and Downloader to develop complete 4DGL application code. All user application code is developed within the Workshop4 IDE.

The Workshop4 IDE supports multiple development environments for the user, to cater to different user requirements and skill levels.

• The Designer environment enables the user to write 4DGL code in its natural form to program the range of 4D System's intelligent displays.
• A visual programming experience, suitably called ViSi, enables drag-and-drop type placement of objects to assist with 4DGL code generation and allows the user to visualise how the display will look while being developed.
• An advanced environment called ViSi-Genie doesn't require any 4DGL coding at all, it is all done automatically for you. Simply lay the display out with the objects you want, set the events to drive them and the code is written for you automatically. This can be extended with additional features when a Workshop4 PRO license is purchased from the 4D Systems website. Extended Advanced features for Visi-Genie are available in the PRO version of WS4. Further details are explained in the Visi Genie section of the Workshop4 documentation.
• A Serial environment is also provided to transform the display module into a slave serial module, allowing the user to control the display from any host microcontroller or device with a serial port.

For more information regarding these environments, refer to the Workshop4 manuals.

The Workshop4 IDE is available from the 4D Systems website.

Reference Design

Timing Diagrams

Display Write Data Timing

Write Data Timing

Item	Sym	Min	Typ	Max	Unit
Write Low Pulse width	tWL	170	-	-	ns
Write High Pulse width	tWH	85	-	-	ns
Write Bus Cycle Total	tWT	255	-	-	ns
Write Data Setup	tDS	85	-	-	ns

Display Read Data Timing

Read Data Timing

Item	Sym	Min	Typ	Max	Unit
Read Low Pulse width	tRL	300	-	-	ns
Read High Pulse width	tRH	300	-	-	ns
Read Bus Cycle Total	tRT	600	-	-	ns
Read Data Hold	tDH	150	-	-	ns

SPI Timing Diagram

Package Details

PCB Land Pattern

Solder Reflow Recommendation

This section discusses the Lead (Pb) free solder reflow process and recommendations.

The solder reflow process typically undergoes five transition periods as shown in the diagram.

1. Preheat – Elevates the assembly's temperature from 25°C to 80-150°C, facilitating the evaporation of solvents from the solder paste.
2. Flux Activation – The dried solder paste undergoes heating to a temperature that activates the flux, enabling it to react with oxides and contaminants present on the surfaces intended for joining.
3. Thermal Equalization – Aims to achieve temperature uniformity, typically around 25-50°C below the reflow temperature. The specific time and temperature required depend on factors such as the mass and materials involved.
4. Reflow – In this phase, the assembly is heated to a temperature sufficient for solder reflow. Notably, the "wetting time" indicates the duration during which the solder remains in a liquid state, typically around 183°C on the curve.
5. Cooling – This marks the concluding stage of the process, emphasizing gradual cooling for optimal results. A slower cooling rate promotes the formation of a finer grain structure in the solder joint, enhancing its resistance to fatigue.

Jedec Reflow Profile

Reflow conditions from IPC/JEDEC J-STD-020C are reproduced in the following diagram and table.

Time and Temperature Parameters

Symbol	Min	Max	Units
Ts	150	200	°C
ts	60	180	seconds
tl	60	150	seconds
Tp	225	240	°C

Reflow Profile Recommendation

The illustration below illustrates the suggested profiles for Pb-free devices. These devices are coated with matte Tin (Pure Sn) and are free of lead content. They are suitable for use in standard tin-lead (SnPb) applications, provided the profile meets or exceeds the lower line in the plot. Alternatively, they can be utilized in Pb-free solder, such as Tin-Silver-Copper (Sn-Ag-Cu), with profiles falling within or below the upper line on the plot.

Specifications and Ratings

Absolute Maximum Ratings

Operating ambient temperature	40°C to +85°C
Storage temperature	-65°C to +150°C
Voltage on any digital input pin with respect to GND	-0.3V to 6.0V
Voltage on SWITCH pin with respect to GND	-0.3V to 6.0V
Voltage on VCC with respect to GND	-0.3V to 4.0V
Maximum current out of GND pin	300mA
Maximum current into VCC pin	250mA
Maximum current sunk/sourced by any pin	4.0mA
Total power dissipation	1.0W

Note

Stresses above those listed here may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the recommended operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.

Recommended Operating Conditions

Parameter	Conditions	Min	Typ	Max	Units
Supply Voltage (VCC)		3.0	3.3	3.6	V
Operating Temperature		-40	--	+80	°C
External Crystal (Xtal)		--	12.00	--	MHz
Input Low Voltage (VIL)	VCC = 3.3V	VGND	--	0.8	V
Input High Voltage (VIH)	VCC = 3.3V	2.0	--	VCC	V

Global Characteristics Based on Operating Conditions

Parameter	Conditions	Min	Typ	Max	Units
Supply Current (ICC)	VCC = 3.3V	--	12	26	mA
Low Power Current (ICC)	VCC = 3.3V, Sleep Mode	75	100	--	uA
Internal Operating Frequency	Xtal = 12.00MHz	--	48.00	--	MHz
Output Low Voltage (VOL)	VCC = 3.3V, IOL = 3.4mA	--	--	0.4	V
Output High Voltage (VOH)	VCC = 3.3V, IOL = -2.0mA	2.4	--	--	V
A/D Converter Resolution	IO1 pin	--	8	--	bits
Capacitive Loading	CLK1, CLK2 pins	--	--	15	pF
Capacitive Loading	All other pins	--	--	50	pF
Flash Memory Endurance	PmmC/4DGL Programming	--	1000	--	E/W

Ordering Information

Order Code: GOLDELOX
Package: QFN28, 6mm x 6mm
Packaging: 16mm tape/reel, pitch 12mm, 1600 units per reel

Revision History

Datasheet Revision

Revision Number	Date	Description
1.0	06/09/2012	First Revision
2.0	01/05/2017	Updated formatting and contents
2.1	21/03/2019	Updated Formatting, Corrected information on maximum baud rate
2.2	13/10/2023	Modified datasheet for web-based documentation
2.3	11/03/2024	Updated formatting for resource centre redesign
2.4	08/05/2024	Added solder reflow recommendation section